High speed serial data interfaces are often used to serially transfer large amounts of data between devices. The serial data streams are typically generated and received by so-called ‘SerDes’ devices (Serializer/Deserializer). A serializer takes a parallel data stream and a clock, and outputs the data in a single (serial) bit stream. The rate of the serial data stream is equivalent to the input clock frequency multiplied by the bit width of the parallel stream. The high speed serial output of the serializer can typically is transmitted over a distance to a receiver. Only the single bit stream needs to be transferred, as the clock used to generate the data stream is embedded in the serial data flow. On the receive side, a deserializer converts the serial data stream into a parallel data stream. From the high-to-low and low-to-high transitions in the serial data stream, a phase locked loop (PLL) circuit coupled with the deserializer attempts to recover the clock. Once locked, a PLL clock can then be used to feed the serial data into a shift register from which it can be read out in a parallel fashion.
The PLL can only recover the clock if there are an adequate number of data transitions contained in the digital stream. Therefore, the data to be transmitted must have a certain number of minimum transitions, otherwise the receive PLL cannot lock onto the incoming data to recover the clock. For data words which do not have the required minimum number of data transitions, the term ‘pathological sequence’ can be used. For example, a pathological sequence may have 5 to 10 consecutive identical digits (CID) as data bits. The actual number of CIDs that can cause loss of lock in a PLL is typically dependent on the constraints of the PLL. Occasional occurrences of pathological sequences may lead to a frequency drift in the recovery PLL and cause bit errors. A larger number of pathological sequences can lead to the receive PLL completely losing lock.
A common way to ensure that no pathological sequences are fed into the SerDes is to use 8b/10b encoding. The data that is to be transmitted has a bit width of 8 bits. The SerDes is configured to accept 10 bits of parallel data. The two additional bits add ‘redundancy’ to the original 8 bits of data. The additional 2 bits are used to insure that even continuous streams of logic zeros (or logic ones) on the encoders input are broken up. In other words, the additional two bits can be set to the inverse of their predecessor, thus forcing a certain number of minimum transitions into the SerDes. However, the downside of this algorithm is that it takes 20% of the bandwidth. The SerDes bandwidth is proportional to the 10 bits at its input. The actually usable data range within the 10 bits is only 8 bits.
An alternative way to attempt to avoid pathological sequences is to use a scrambling algorithm. Most of the scrambling algorithms are based on LFSR (linear feed back shift register) architectures. These scramblers take the arbitrary input data and modulate it with a known, pseudo random number sequence. This decreases the chances of an unacceptable string of consecutive identical digits dramatically due to the pseudo random nature of the modulating signal. An example of such a system used in video transmission is the Society of Motion Picture and Television Engineers (SMPTE) scrambler as specified in SMPTE 259M.
While the use of scramblers such as the SMPTE 259M substantially decreases the number of pathological sequences, they can not avoid them completely. This is due to the fact that the bit width on the input to the scrambler is the same as on the output of the scrambler and there are no reserved codes or other redundancy built in. Hence, pathological sequences can only be spread over time but they can not be transcoded into safe codes. Whether or not a serial transmission system can actually deal with pathological sequences depends on a number of parameters. Even the use of a scrambler does not guarantee that a pathological sequence will not occur. Given the application of the SMPTE 259M standard to high-definition television where even a brief loss of lock by the PLL can result in a negative viewing experience for the viewer, a more reliable data stream would be beneficial.